Silabo de Carrera de Electricidad: Sistemas Digitales 2
This syllabus outlines the curriculum for Sistemas Digitales 2 (Digital Systems 2), a course within an Electricity career program. It is designed to build upon the foundational knowledge acquired in Sistemas Digitales 1, delving deeper into advanced digital logic, design, and applications.
Course Description: This course expands on the fundamental concepts of digital logic and design introduced in Sistemas Digitales 1. Students will learn advanced techniques for designing and implementing complex digital systems, including state machines, memory systems, and arithmetic logic units (ALUs). Emphasis will be placed on practical application through hands-on projects and problem-solving exercises. The course will also introduce students to relevant software tools used in digital system design and verification.
Course Objectives: Upon successful completion of this course, students will be able to:
- Analyze and design complex combinational and sequential logic circuits: This includes mastering techniques like Karnaugh maps, state diagrams, and various flip-flop configurations.
- Implement digital systems using programmable logic devices (PLDs): Students will gain practical experience programming FPGAs and CPLDs to implement their designs.
- Understand and apply arithmetic logic unit (ALU) design principles: This involves designing and implementing ALUs capable of performing various arithmetic and logical operations.
- Design and implement memory systems: Students will learn about different memory types (RAM, ROM) and design methods for incorporating memory into digital systems.
- Utilize digital design software: Proficiency in industry-standard software for schematic capture, simulation, and synthesis will be developed.
- Troubleshoot and debug digital circuits: Students will learn systematic methods for identifying and resolving errors in digital designs.
- Apply theoretical knowledge to real-world applications: Projects will focus on practical applications of digital systems in various electrical engineering fields.
Course Content:
Module 1: Advanced Combinational Logic Design:
- Minimization techniques beyond Karnaugh maps.
- Multi-level logic optimization.
- Design of arithmetic circuits (adders, subtractors, multipliers).
- Implementation using different logic families (TTL, CMOS).
Module 2: Sequential Logic Design and State Machines:
- Detailed analysis of various flip-flop types (JK, D, T, SR).
- Design of synchronous and asynchronous sequential circuits.
- State diagram design and implementation.
- State minimization techniques.
- Design of counters and registers.
Module 3: Memory Systems:
- RAM and ROM architectures and characteristics.
- Memory addressing modes.
- Design of memory interfaces.
- Introduction to cache memory concepts.
Module 4: Arithmetic Logic Units (ALUs):
- ALU design and implementation.
- Operation codes and control signals.
- Design of flags and status registers.
- ALU testing and verification.
Module 5: Programmable Logic Devices (PLDs):
- Introduction to FPGAs and CPLDs.
- Hardware Description Languages (HDLs) – VHDL or Verilog (choose one based on curriculum).
- Design entry and simulation using HDL.
- Synthesis and implementation of designs on PLDs.
Module 6: Digital System Design and Verification:
- Design methodologies (top-down, bottom-up).
- Simulation and verification techniques.
- Testing and debugging strategies.
Assessment:
- Laboratory Exercises (40%): Hands-on projects implementing various digital circuits and systems.
- Quizzes (20%): Regular assessments to evaluate understanding of concepts.
- Midterm Exam (20%): Comprehensive examination covering the first half of the course.
- Final Exam (20%): Comprehensive examination covering the entire course.
Required Materials:
- Textbook (Specific title and author will be provided by the instructor).
- Access to digital design software (specified by the instructor).
Prerequisites: Sistemas Digitales 1 (or equivalent).
This syllabus is subject to change at the instructor's discretion. Any modifications will be announced in a timely manner. Student success depends on regular attendance, active participation, and diligent completion of all assigned work.
